1. Field of the Invention
The present invention relates to a method of manufacturing a mixed-mode device. More particularly, the present invention relates to a method of manufacturing a high voltage mixed-mode device.
2. Description of the Related Art
A mixed-mode circuit typically includes a circuit comprising both digital and analog devices on a logic area of a semiconductor chip. The digital devices include inverters, and adders, and the analog devices include amplifiers and analog-to-digital converters. The digital and analog devices further comprise elementary devices such as MOS transistors and capacitors.
FIGS. 1A through 1D are schematic, cross-sectional views of the conventional process for manufacturing a mix-mode device.
First, as shown in FIG. 1A, a substrate 100 is provided. The substrate 100 comprises an active region 101 and a field oxide layer 102. An oxide layer 104 is formed on the active region 101. Using chemical vapor deposition, a conductive layer 106 such as a polysilicon layer is formed on the oxide layer 104 and the field oxide layer 102.
As shown in FIG. 1B, the conductive layer 106 is patterned to form a conductive layer 106a as a bottom electrode of a capacitor on the field oxide layer 102.
As shown in FIG. 1C, the oxide layer 104 is removed. A thermal oxidation step is used to form a gate oxide layer 108 on the substrate 100 and an oxide layer 110 on the surface and the sidewall of the bottom electrode 106a. The oxide layer 110 is used as an inter-polysilicon dielectric layer of the capacitor. A conductive layer 112 such as a polysilicon layer is conformally formed over the substrate 100.
As shown in FIG. 1D, the conductive layer 112 is patterned to form an upper electrode 112a on the field oxide 102 and a conductive layer 112b on the oxide 108 over the active region 101 . The conductive layer 112b is a gate of the transistor.
In the prior processes for manufacturing the transistor gate and the capacitor in the mixed-mode device, only a low-voltage transistor gate on the active region and a capacitor on the field oxide layer are formed. The goal of forming a mixed-mode device comprising both high and low voltage transistors, and capacitors is not attainable, especially for the sub-micron fabrication process.